The present invention relates generally to an arrangement for and method of allowing a computer controlled system having a host computer and system Random Access Memory (RAM) to communicate with a data storage device connected to the computer controlled system using a bus which allows bus-initiated bus-mastering. More particularly the present invention relates to storing operating data and code for controlling the operation of the data storage device in the system RAM for use by the host computer and/or the data storage device.
As used herein, it is to be understood that the terms computer controlled system or computer system refers to any system which includes a host computer arrangement or a microprocessor for controlling the operation of the system. It is also to be understood that the term System RAM refers to any memory used by the host computer or microprocessor for its operation. The computer controlled system may include consumer electronics, appliances, or any other computer controlled device as well as general purpose computers such as personal computers and computer servers. It should also be understood that the terms data storage device or storage device are intended to include hard disk drives, CD drives, floppy disk drives, removable hard disk drives, and other storage devices including other optical, magnetic, opto-magnetic, and any other mass storage peripheral devices. These other storage devices also include devices such as digital video disk devices and flash memory which are currently being developed for use as storage devices for various types of computer systems. Also, as used herein, the phrases operating data and code or operating data/code are intended to refer to all of the various data and code that is required in order to operate the storage device.
Storage devices of all types share certain characteristics including an arrangement to uniquely address each addressable unit of the data on the media in which data is stored, an arrangement to control the device, and an arrangement to transport the data from the device to the system to which the device is connected. Hard disk drives are among the oldest and most popular of storage devices and have the longest history within computer systems. While much of the following discussion specifically relates to hard disk drives, it is to be understood that the principles of data addressing, device control, and data transport are not unique to hard disk drives and relate generally to all types of storage devices.
During the development of the personal computer industry, the typical arrangements for operating a hard disk drive connected to a host computer have gone through a series of evolutions. When the personal computer was first being developed, it was assumed that hard disk drives would be divided into cylinders, heads, and sectors which would clearly define each data sector in which information could be stored on the hard disk drive. The DOS operating system defined a multiple byte, bit significant command structure with organizational limits of 1024 cylinders, 64 heads, and 64 sectors which corresponded to a total of 4,194,304 data sectors. The system BIOS, or a utility program used by this early computer system, was used to store any defective data sectors of the hard drive. These defective data sectors were required to be known by the system when the drive was formatted for use by the system. The system would not allow these defective data sectors to be used during the operation of the system. Therefore, only known good data sectors were used to store data and the actual cylinder, head, and sector (CHS) on which the data was stored on the hard disk drive corresponded to the CHS data addressing information used by the operating system running the host computer.
In the early stages of development, the system BIOS also contained information on all of the disk drives which could be used with the system. As the number of drives available grew this approach became more and more difficult. The solution was to create user defined configuration information which could be used by the system.
These early approaches allowed the operating system to communicate with the disk drive using a relatively simple system BIOS which did not need to perform any translation of the CHS data address information. When the operating system of these early systems made a read/write request through the system BIOS, the system BIOS would simply pass the CHS address information on to the disk drive without having to translate the address information into some other format. Also, the disk drive was relatively simple in that it did not require any complex disk drive firmware as part of the disk drive to provide a translation function or handle the problem of keeping track of the defective data sectors since these functions were provided by the system.
The disk drive industry independently developed its own interface standards or limits known as Integrated Device Electronics (IDE) which also included a command structure. These IDE standards imposed limits which were different from the limits imposed by the operating system and system BIOS. The IDE command structure limits were set at 65,535 cylinders, 16 heads, and 256 sectors which provided a total of 268,431,360 data sectors. Since both standards utilized the same CHS addressing structure, the overall system limits were dictated by the lowest common bits for each field for the cylinders, heads, and sectors. This resulted in a combined limit of 1024 cylinders, 16 heads, and 64 sectors for a total of 1,048,576 data sectors. Although the combination of these two different limits did not initially create a problem by overly limiting the total data storage capacity of the disk drive, the demand for larger and larger capacity disk drives did eventually create a desire to offer drives which provided more sectors than were available according to the combination of these two limits.
To compensate for these combined limits, translation software was developed to translate from the operating system limits to the IDE drive limits. This software was provided in the form of either translating system BIOS or boot overlay translating BIOS software. The translation software allowed the operating system to use the entire theoretical number of data sectors which the operating system limits allowed by translating from an operating system based CHS address to a disk drive based CHS address. However, each time a read/write request was made by the operating system, the translator had to translate the operating system's theoretical CHS address information (based on the DOS operating system standards) into logical CHS address information used by the disk drive (based on the disk drive industry standards). This translation required additional processing time slowing down the system but it increased the number of available data sectors back to the limits imposed by the operating system.
Technical developments in the disk drive industry further complicated the task of interfacing the hard disk drive with the host computer by making the hard disk drives more complex. The first additional development was that the hard disk drive industry began defining each data sector according to cylinders, heads, sectors, and zones. The zones of the disk drive correspond to different groups of cylinders of the disks with each of the zones having data stored at different frequencies in order to more efficiently use the data storing density of the disks. For example, the outer cylinders, which correspond to a first zone, may be read and written at a first frequency. The middle cylinders making up a second zone may be read/written at a second slower frequency. And finally, the inner cylinders, associated with a third zone, may be read and written at a third even slower frequency.
Although the use of zones increased the storage capacity of a given hard disk drive, it also further increased the complexity of the disk drive firmware and disk drive operating data required to control the disk drive. These new, complex disk drives required more complex disk drive firmware to perform another translation from the logical IDE CHS address information to the actual cylinder, head, sector, and zone address information actually used by the disk drive. Also, these complex disk drives required the disk drive read channel to be able to be operated at different frequencies depending on the zone being accessed. This required the complex disk drive to include disk drive operating data identifying which sectors were in which zones, read channel data identifying which control settings (such as frequencies) should be used when accessing data within each of the various zones, and disk drive firmware for controlling these more complex zone oriented operations of the complex disk drive. For purposes of discussion, disk drives including the above described zones will be referred to throughout the specification and claims as a complex disk drive.
In another development, the disk drive industry changed the way the cylinders, heads, and sectors were typically addressed. Initially, each data sector on the disk drive included an identification field containing the address of that field and including information on whether that sector was defective or not. These identification fields for each of the data sectors used a significant portion (i.e. 7-10%) of the data storage space on the disk drive thereby reducing the amount of usable data storage space for a given disk drive. As more advanced disk drives having more sophisticated controllers and firmware became available, the need for an identification field associated with each data sector was eliminated thereby increasing the data storage capacity of a given disk drive. However, using this approach required the defect information identifying which sectors of the disk drive are defective to be stored in a different way.
In order to solve this problem, disk drive operating data in the form of a defect list containing a list of all the defective data sectors on the complex disk drive is typically stored on the storage media of the complex hard disk drive. The defect list is loaded into a RAM memory buffer on the disk drive device during the initialization of the disk drive so that the list is available to the hard drive controller and/or firmware during the operation of the disk drive. This approach requires an even more complex controller, more complex disk drive firmware to operate the controller, and a larger RAM memory buffer than would otherwise be required so that the data associated with the defect list may be stored in the memory buffer for use throughout the operation of the complex disk drive. All of these requirements add still further to the cost of providing the complex hard disk drive.
Using this defect list approach, the complex hard disk drive controller uses complex hardware and/or disk drive firmware to sort through this list of defective memory storage locations each time a read/write request is made making sure a defective data sector is not utilized. This sorting adds yet another time consuming process to the operation of the system that must be performed each time the complex disk drive reads or writes data and therefore slows down the overall operation of the system.
Since storage devices are typically electromechanical in nature, the time required to access data is much longer than the time required to access system RAM, effectively decreasing system performance. In order to decrease some of the effects of mechanical latencies, it is possible to utilize time that the storage device would normally be idle to gather data from the storage media which has a high likelihood of being accessed by the system and storing that data in a fast access storage element such as RAM on the storage device. Such a mechanism is commonly known throughout the industry as read caching. There are several read caching mechanisms, some of which are anticipatory in nature while others are based upon data retention. In addition, there are mechanisms to retain write data in a write cache until it is convenient to physically record it to the storage device. Hopefully this data is recorded at a time that will decrease the impact on the system performance.
Storage devices typically employ electronic data storage elements such as RAM on the device to store read cache data or store write cache data. While caching is not required for the operation of a storage device, it has become a standard feature on many storage devices. The additional RAM used for read/write caching further increases the cost of the storage device.
In more recent developments in computer architecture, new serial and parallel bus architectures have been defined which implement device-initiated bus-mastering. Device-initiated bus-mastering is a mechanism which allows the device to control the address which is being written to or read from system memory. Additionally, device-initiated bus-mastering allows a device to bus master at will without any other controlling hardware or software on the host. The PCI (Peripheral Computer Interconnect) bus implements this mechanism on a parallel bus configuration. The IEEE 1394 specification implements this mechanism on a serial bus configuration.
Some of the new peripheral bus architectures also allow relocatable device specific host software to be loaded from the device into system RAM in the form of relocatable Expansion BIOS. This greatly reduces the device's dependency on the host system BIOS. One current example of this is the PCI bus architecture. Other bus architectures, such as the IEEE 1394 bus, may add these capabilities in the future.
Referring to FIG. 1, a typical current computer system, generally indicated by reference numeral 10, including a complex IDE hard disk drive and a complex hard disk drive connected to the system using a SCSI (Small Computer System Interface) adapter card and a PCI bus will be described. As shown in FIG. 1, system 10 includes a host computer module 11 (hereinafter referred to in the specification and the claims as a host computer) having system BIOS ROM 12 or otherwise loaded system ROM code and system RAM 13. The system is operated using a system BIOS code 14 and either a system translating BIOS 15 or boot overlay translating BIOS software which was either stored within system BIOS ROM 12 or loaded in system RAM 13 (shadow or loaded). A host bridge 16 connects host computer 11 to an ISA bus 17 and a PCI bus 18. A first complex hard disk drive 19 is connected to ISA bus 17 using ribbon cable 20. Drive 19 includes disk drive firmware 21 stored in ROM 22 and disk drive controller 23 for controlling the operation of disk drive 19.
A peripheral device, in the form of a SCSI adapter card 24 is connected to PCI bus 18 and includes a protocol translator 25 for translating all of the communications passing through adapter card 24 between the PCI protocol of the PCI bus and the protocol of the adapter card, in this case SCSI protocol. Adapter card 24 also includes Expansion BIOS ROM 26 which contains Expansion BIOS for initializing and operating adapter card 24 during the start-up of the system. System 10 further includes a second complex hard disk drive 27 which is connected to adapter card 24. Disk drive 27 includes a RAM memory buffer 28, a disk drive controller 29, and disk drive firmware 30 stored within ROM 31 for controlling the operation of the hard disk drive 27. Hard disk drive 27 is electrically connected to adapter card 24 using ribbon cable 32. Both complex hard disk drives 19 and 27 are divided into cylinder, heads, sectors, and zones which specifically define each data sector within hard disk drives 19 and 27.
In a typical PCI based system as described above, when the system is turned on, system BIOS 14 checks the system first for peripheral devices connected to ISA bus 17 such as complex disk drive 19. In this case, when disk drive 19 is located, the system BIOS initializes disk drive 19 and configures it for use within the system. Hard disk drive 19 includes a RAM memory buffer 34 and the initialization process for hard disk drive 19 includes loading information such as a defect list of all of the defective memory storage locations on the hard disk drive from the storage media of hard disk drive 19 into a RAM memory buffer 34. This information is available for use by disk drive firmware 21 throughout the operation of disk drive 19.
After the ISA devices have been configured, the system then checks for peripheral devices connected to PCI bus 18 such as adapter card 24. When adapter card 24 is located, the system BIOS checks to see if there is any Expansion BIOS associated with the adapter card. If there is Expansion BIOS associated with the adapter card, in this case the Expansion BIOS in Expansion BIOS ROM 26, the Expansion BIOS is loaded into RAM 13 by the system ROM code. Adapter card 24, along with any attached peripherals such as complex disk drive 27, are then initialized. The initialization process for hard disk drive 27 includes loading information such as a defect list of all of the defective memory storage locations on the hard disk drive from the storage media of hard disk drive 27 into RAM memory buffer 28 so that this information is available for use by disk drive firmware 30 throughout the operation of disk drive 27. After system 10 is finished checking for devices connected to the PCI bus of the system, the system BIOS goes on to load an operating system which is used to control the operation of the overall system.
Referring to FIG. 1 along with the block diagrams of FIGS. 2A and 2B respectively, the operation of system 10 when an application program 35 being run on the system makes a read/write request of either complex hard disk drive 19 or 27 will be briefly described. With respect to hard drive 19 and as shown in FIG. 2A, when application 35 makes a read/write request of hard drive 19, an operating system 36 for operating the system 10 receives the request and determines the theoretical, or logical, address information at which operating system 36 believes the data is stored within disk drive 19. A device driver 37, which is specific to operating system 36, translates the operating system logical address information into system logical address information (translation #1). System translating BIOS 15 then translates this system logical address information into logical address information used by IDE disk drive 19 (translation #2). Firmware 21, using controller 23, translates the logical IDE address information into physical cylinder, head, sector, and zone address information used by the disk drive (translation #3) and checks a defective memory storage location list to make sure defective data locations are not utilized. Once these three translations are complete, controller 23 reads or writes the requested information from or to the media.
Referring now to FIG. 2B, when application 35 makes a read/write request of complex disk drive 27, operating system 36 receives the request and determines the logical address information at which operating system 36 believes the data is stored within disk drive 27. Operating system 36 then generates a read/write request to have disk drive 27 read/write the data at the determined logical address. Device driver 37 translates the operating system logical address information into system logical address information (translation #1). The Expansion BIOS associated with SCSI card adapter 24, which was loaded into system RAM during the start-up of the system, translates the system logical address information into SCSI logical address information as indicated in block 38 (translation #2). Firmware 30, using controller 29, translates the SCSI logical address information into physical cylinder, head, sector, and zone address information used by the disk drive (translation #3) and checks the defective memory storage location list stored in memory buffer 28 to make sure defective data locations are not utilized. And finally, after each of these translations are complete, controller 29 reads or writes the requested information.
As can be seen by the above description, several translations are required in both directions for each information request for both disk drive 19 and disk drive 27. These translations use processing time, slowing the speed of the overall system. Also, this general approach requires a complex translating BIOS or Expansion BIOS and complex disk drive firmware on the disk drive in order to operate the currently available complex disk drives typically used in current systems. These requirements add significantly to the cost of the hard disk drive by requiring (i) a greater amount of ROM on the drive for storing the more complex disk drive firmware, (ii) a more powerful processor or controller on the drive to perform the tasks of translating the address information, (iii) a greater amount of buffer RAM on the drive for storing and manipulating the operating data of the complex disk drive, and (iv) increased product development and verification time and expense due to the increased complexity of the drive.
Referring to FIG. 3, the operation of typical computer system 10 including a hard disk drive will be further described. At this point, the operation will be described in terms of drive 27, however, the operation of drive 19 would be carried out in a similar manner. In order to operate complex disk drive 27, host computer 11 includes host code 40 which is part of system BIOS code 14 and which is stored in system RAM 13. Host code 40 is used to provide command control of disk drive 27. Disk drive 27 includes certain operating data and code 42 which are required for the operation of disk drive 27. Operating data/code 42 include disk drive firmware 30A and 30B which are stored in ROM 31 and disk drive operating data 44, which is stored in RAM memory buffer 28 for use by firmware 30A and 30B during the operation of the disk drive. Disk drive operating data 44 includes a variety of disk drive operating data such as zone location data, control settings data for controller 29, and defective memory storage location data which is required for the operation of the disk drive.
As illustrated by arrow 46 in FIG. 3, host code 40 in system RAM 13 only has command control over disk drive 27, that is, host code 40 does not have access to disk drive operating data 44. Also, host code 40 does not include the hard disk drive specific firmware necessary to utilize disk drive operating data 44 or control the specific operations of disk drive 27. Because of this, host code 40, and therefore host computer 11, is not able to i) translate the address information into the address information required by the lowest level of the disk drive firmware in disk drive 27 and ii) identify and therefore not utilize the defective memory storage locations on disk drive 27. Therefore, as described in general above, all of these tasks must be performed by disk drive firmware 30A and 30B in disk drive 27 increasing the complexity and costs of the disk drive. After these tasks have been performed by disk drive 27 and the command requested by host code 40 has been executed, disk drive 27 returns the appropriate information back to the host computer as indicated by arrow 48.
When complex disk drive 27 receives a command from host code 40 of the host computer, disk drive firmware 30A translates the address information into address information used by the disk drive as described in detail above. Firmware 30A uses the defect information of disk drive operating data 44 stored in RAM memory buffer 28 to insure that defective memory storage locations are not utilized. By requiring complex disk drive 27 to carry out these functions and as generally described above, complex disk drive 27 requires a more complex controller, more complex firmware, and, in order to store disk drive operating data 44, a larger RAM memory buffer than would otherwise be necessary. These requirements add further to the cost of the hard disk drive by requiring (i) even more ROM within the disk drive for storing the additional disk drive firmware, (ii) a relatively large amount of RAM memory buffer space for storing disk drive operating data 44 for use during the operation of the disk drive, (iii) a more powerful processor or controller to perform the tasks of sorting through the defect lists and other disk drive operating data, and (iv) more product development time and expense.
As generally illustrated in FIG. 4, the present invention provides an arrangement for operating a complex hard disk drive device which is connected to a host computer having system RAM. This arrangement allows at least a portion of the disk drive operating data and code in the form of disk drive firmware and/or disk drive operating data required for the operation of the complex disk drive and normally stored in the complex disk drive itself to be stored in system RAM. An example of this is illustrated by the differences in FIGS. 3 and 4. In accordance with the invention, in FIG. 4, disk drive firmware 30A and disk drive operating data 44 have been stored into system RAM 13. This arrangement also allows the host computer access to the disk drive operating data and code stored in system RAM such that the host computer may use the operating data and code to control the operation of the disk drive. The hard disk drive also has access to the operating data stored in system RAM such that the disk drive may use the operating data to control the operation of the disk drive. As will be described in detail hereinafter, this arrangement allows i) the amount of ROM required on board the disk drive for storing the disk drive firmware to be significantly reduced, ii) the complexity of the disk drive controller to be significantly reduced, iii) the amount of RAM memory buffer space required to store the disk drive operating data used during the operation of the disk drive to be significantly reduced or even eliminated, and (iv) the product development time and expense to be decreased. These reductions in the requirements of the components of the hard disk drive combine to allow substantial cost savings along with improved performance when providing a hard disk drive in accordance with the invention.
Using the arrangement of the present invention, cache functions can also be provided using system RAM. If this is the case, host executable firmware 30A in FIG. 4, allocates a portion of the system RAM for cache use. Therefore, the firmware 30A is able to issue unsolicited read commands to the storage device which then fills the system cache RAM with data which the operating system or application may request in the future. When such data is requested, it is already resident in system RAM, and can be quickly moved to the locations specified by the operating system or application program. Write cache is supported by allowing write data to remain within the system cache RAM after the firmware 30A reports to the operating system that the data has been written to the storage device. At some later convenient point in time, the firmware 30A issues write commands to the storage device in order to transport the data to the storage device media.
Using system RAM for cache in accordance with the invention and as briefly described above is much more efficient and cost effective than using storage device RAM. System RAM costs less per megabyte than device RAM, as it is usually purchased in larger blocks. Additionally, the amount of system RAM used for cache can be configured according to the needs of the user and the amount of system RAM available. A small amount of the cache can be allocated for systems where there is limited RAM available, and a larger cache for systems with more RAM. On system accesses where data is already in the system RAM, it is much faster to transfer the data from one location in system RAM to another rather than from the device. Therefore, this use of system RAM for cache provides improved cache performance.
FIG. 4 contrasts the operational control of a complex hard disk drive in accordance with the invention with the conventional system of FIG. 3 using the same reference numerals to represent items in FIG. 4 as were used to describe FIG. 3. As shown in FIG. 4, the present invention maintains host code 40 in system RAM 13 as was described for FIG. 3. However, in accordance with the invention, some or all of disk drive operating data 44 is stored in system RAM 13 rather than in the RAM memory buffer 28 of the hard disk drive. Also, a portion of the disk drive firmware, specifically the functionality of firmware 30A, is stored in system RAM 13 and operated (executed) on the host computer rather than being stored in ROM 31 on board the storage device and operated (executed) by the disk drive as was described above in FIG. 3. Only a portion of the disk drive firmware, that is firmware 30B, is required to be stored on board the disk drive for use during the operation of the disk drive. Furthermore, in accordance with the present invention and as indicated by arrows 50 and 52, the arrangement of the present invention allows both firmware 30B on the disk drive and the firmware stored in system RAM, that is firmware 30A, access to disk drive operating data 44 stored in system RAM.
As will be described in detail hereinafter, this arrangement allows many of the functions typically required to be carried out by the conventional complex hard disk drive firmware and controller to be performed by the host computer. For Example, the function of address translation to address information actually used by the disk drive and defective memory list management may be performed by the host computer. This arrangement also allows the host computer to perform other functions more intelligently such as read ahead and write caching functions as well as perform functions which were not previously possible using the conventional approach of keeping the disk drive firmware and data exclusively within the disk drive.
To this point, the operation of a conventional storage device has been described in detail with reference to a hard disk drive. However, the general principles of data addressing, device control, and data transport would be similar for other storage devices. For example, in the case of a CD drive, the CD drive typically includes operating data and code for controlling the operation of the CD drive. Since CD drives have not gone through the same extent of evolutions as described above for the hard disk drives, they may not have the problems associated with the multiple translations of addressing information. Other storage devices such as floppy drives, removable hard disk drives, and various other storage devices also utilize operating data and code to control the operation of the device. Although the operating data and code of these various devices would be specific to each particular type of device, the general principles would be similar to those described above for a hard disk drive.
The present invention allows operating data and code typically stored in the device itself and typically only used by the device itself to control the operation of the device to be stored in system RAM. In accordance with the invention, storing the operating data and code in the system RAM allows the host computer to use the operating data and code to control the operation of the storage device. By using the host computer to control some of the operations of the storage device, the cost and complexity of the storage device may be significantly reduced. Also, since the processors within the host computer are usually more powerful and since the system RAM may be accessed more quickly by the host system, the performance of the overall system may be improved.